Energy Efficient Sensor Node Implementations

Jan Frigo1,  Eric Raby1,  Ed Rosten2,  Vinod Kulathumani3,  Christophe Wolinski4,  Charles Wagner4,  Francois Charot4,  Sean Brennan1
1LANL, 2Dept. of Engineering, University of Cambridge, 3Dept. of Computer Science and Electrical Engineering, West Virginia University, 4University of Rennes, IRISA


Abstract

In this paper, we discuss a low power embedded sensor node architecture we are developing for distributed sensor network systems deployed in a natural environment. In particular, we examine the sensor node for energy efficient processing-at-the-sensor. We analyze the following modes of operation; event detection, sleep, data acquisition, data processing modes using low power, high performance embedded technology such as specialized embedded DSP processors and low power FPGAs at the sensing node. We use compute intensive sensor node applications: an acoustic vehicle classifier (frequency domain analysis) and a video license plate identification application (learning algorithm) as a case study. We report performance, energy and total average power usage for our system designs and discuss the system architecture design trade offs.