We present an approach to perform transformation and reduction data operations in an intelligent network switch comprised of FPGAs. In this paper, we show an example of a data sorting application that uses parallel servers to pre-sort data and then using the FPGAs within the switch to sort data as it passes through the network thereby reducing computation requirements at the client node. The sorting architecture takes advantage of the NetFPGA board to perform a 4-way merge sort in an embedded network FPGA device. Using this architecture we show how sort computation times can be reduced significantly.